AX1252-1A Sink/Source Bus Termination Regulator with 1A LDO PDF文档下载 (2015年7月停产)
The AX1252 is a 1A low dropout linear regulator with a high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL,SCSI-2 and SCSI-3 etc. devices requirements. The DDR regulator is capable of actively sinking or sourcing up to 1A. The output termination voltage cab be tightly regulated to track 1/2VDD by two external voltage divider resistors or the desired output voltage can be programmed by externally forcing the REFEN pin voltage.
The AX1252 has an adjustable output LDO. The regulator output can be used to DDR input (VDD) this application is avoided two power input. The supply voltage is from 2.8V to 5.5V.
The AX1252 incorporates a high-speed differential amplifier to provide ultra-fast
response in line/load transient. Other features include extremely low initial offset voltage,excellent load regulation, current limiting in and thermal shut-down protection. The AX1252 is available in the SOP8-EP (Exposed Pad) surface mount package.
- Ideal for DDR-I, DDR-II and DDR-III VTT Applications
- Each channel 1A Continuous Current for LDO and DDR
- Integrated Power Driver
- Generates Termination Voltage for SSTL_2, SSTL _18, HSTL, SCSI-2 and SCSI-3 Interfaces.
- High Accuracy Output Voltage at Full-Load
- DDR Output Adjustment by Two External Resistors
- LDO adjustable output by outside resistors.
- Low External Component Count
- Independent Shutdown function
- Current Limiting and Thermal Shutdown Protections
- SOP-8L with exposed pad Pb-Free Package.